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Message-ID: <4BB28537.2060003@linux.vnet.ibm.com>
Date:	Tue, 30 Mar 2010 16:11:51 -0700
From:	Corey Ashford <cjashfor@...ux.vnet.ibm.com>
To:	eranian@...il.com
CC:	stephane eranian <eranian@...glemail.com>,
	Lin Ming <ming.m.lin@...el.com>,
	Peter Zijlstra <peterz@...radead.org>,
	Ingo Molnar <mingo@...e.hu>,
	LKML <linux-kernel@...r.kernel.org>,
	Andi Kleen <andi@...stfloor.org>,
	Paul Mackerras <paulus@...ba.org>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Xiao Guangrong <xiaoguangrong@...fujitsu.com>,
	Dan Terpstra <terpstra@...s.utk.edu>,
	Philip Mucci <mucci@...s.utk.edu>,
	Maynard Johnson <mpjohn@...ibm.com>,
	Carl Love <cel@...ibm.com>,
	Steven Rostedt <rostedt@...dmis.org>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Masami Hiramatsu <mhiramat@...hat.com>
Subject: Re: [RFC] perf_events: support for uncore a.k.a. nest units

On 3/30/2010 2:28 PM, stephane eranian wrote:
> On Tue, Mar 30, 2010 at 6:49 PM, Corey Ashford
> <cjashfor@...ux.vnet.ibm.com>  wrote:
>> 4) How do we choose a CPU to do the housekeeping work for a particular nest
>> PMU.  Peter thought that user space should still specify the it via
>> open_perf_event() cpu parameter, but there's also an argument to be made for
>> the kernel choosing the best CPU to handle the job, or at least make it
>> optional for the user to choose the CPU.
>>
> One of the housekeeping task is to handle uncore PMU interrupts, for instance.
> That is not a trivial task given that events are managed independently and
> that you could be monitoring per-thread or system-wide. It may be that
> some uncore PMU can only interrupt one core. Intel Nehalem can interrupt
> many at once.

That's a good point, and I think it's unreasonable to expect that the user knows 
exactly how the interrupts are connected from the uncore/nest PMU to which CPU(s).

Perhaps one way around this would be to return an error if the chosen CPU wasn't 
fully capable of performing the housekeeping functions for the requested PMU. 
But this certainly isn't ideal, because relying on this mechanism would require 
that the user (or user tool) figure out which CPU is fully capable by 
trial-and-error.

- Corey

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