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Message-ID: <alpine.DEB.2.00.1004060956580.1417@cl320.eecs.utk.edu>
Date: Tue, 6 Apr 2010 10:01:19 -0400 (EDT)
From: Vince Weaver <vweaver1@...s.utk.edu>
To: Ingo Molnar <mingo@...e.hu>
cc: LKML <linux-kernel@...r.kernel.org>,
Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Paul Mackerras <paulus@...ba.org>,
Arnaldo Carvalho de Melo <acme@...hat.com>
Subject: [PATCH] perf enable Nehalem-EX support
According to Intel Software Devel Manual Volume 3B, the Nehalem-EX PMU is
just like regular Nehalem (except for the uncore support, which is
completely different).
Signed-off-by: Vince Weaver <vweaver1@...s.utk.edu>
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 84bfde6..9c794ac 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -936,6 +936,7 @@ static __init int intel_pmu_init(void)
case 26: /* 45 nm nehalem, "Bloomfield" */
case 30: /* 45 nm nehalem, "Lynnfield" */
+ case 46: /* 45 nm nehalem-ex, "Beckton" */
memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
--
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