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Message-ID: <alpine.DEB.2.00.1004061033330.18750@router.home>
Date: Tue, 6 Apr 2010 10:41:47 -0500 (CDT)
From: Christoph Lameter <cl@...ux-foundation.org>
To: "Zhang, Yanmin" <yanmin_zhang@...ux.intel.com>
cc: Tejun Heo <tj@...nel.org>, Pekka Enberg <penberg@...helsinki.fi>,
alex.shi@...el.com,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Ma, Ling" <ling.ma@...el.com>,
"Chen, Tim C" <tim.c.chen@...el.com>,
Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: hackbench regression due to commit 9dfc6e68bfe6e
On Tue, 6 Apr 2010, Zhang, Yanmin wrote:
> Thanks. I tried 2 and 4 times and didn't see much improvement.
> I checked /proc/vamallocinfo and it doesn't have item of pcpu_get_vm_areas
> when I use 4 times of PERCPU_DYNAMIC_RESERVE.
> I used perf to collect dtlb misses and LLC misses. dtlb miss data is not
> stable. Sometimes, we have a bigger dtlb miss, but get a better result.
>
> LLC misses data are more stable. Only LLC-load-misses is the clear sign now.
> LLC-store-misses has no big difference.
LLC-load-miss is exactly what condition?
The cacheline environment in the hotpath should only include the following
cache lines (without debugging and counters):
1. The first cacheline from the kmem_cache structure
(This is different from the sitation before the 2.6.34 changes. Earlier
some critical values (object length etc) where available
from the kmem_cache_cpu structure. The cacheline containing the percpu
structure array was needed to determome the kmem_cache_cpu address!)
2. The first cacheline from kmem_cache_cpu
3. The first cacheline of the data object (free pointer)
And in case of a kfree/ kmem_cache_free:
4. Cacheline that contains the page struct of the page the object resides
in.
Can you post the .config you are using and the bootup messages?
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