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Message-Id: <20100406.104635.210218044.davem@davemloft.net>
Date:	Tue, 06 Apr 2010 10:46:35 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	srostedt@...hat.com
Cc:	fweisbec@...il.com, sparclinux@...r.kernel.org,
	linux-kernel@...r.kernel.org, mingo@...e.hu, acme@...hat.com,
	a.p.zijlstra@...llo.nl, paulus@...ba.org, rostedt@...dmis.org
Subject: Re: Random scheduler/unaligned accesses crashes with perf lock
 events on sparc 64

From: Steven Rostedt <srostedt@...hat.com>
Date: Tue, 06 Apr 2010 09:41:04 -0400

> It's best to send to my rostedt@...dmis.org account, just like it is
> best to send to your davem@...emloft.net ;-)

Ok then you should, like me, use it in your commits :-)

> OK, so the a 64 bit word still needs 64 bit alignment when storing to a
> data pointer.
> 
> I wonder if we should just have a special copy in this case for the
> events and remove this patch in the ring buffer. That is:
> 
> 	__assign_word(__entry->word, value);
> 
> And have in !CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS be:
> 
> 	#define __assgin_word(dest, src)	\
> 		memcpy(&(dest), &(src), sizeof(src));
> 
> This would fix it for all.

Doesn't work, first of all, because if gcc can see the types
it will inline emit aligned loads and stores.

Secondly, the accessors who read in these entries need them to be
aligned too.

> What about removing the logic from the ring buffer and moving it to the
> TRACE_EVENT() macros as I suggested above?

No, that makes no sense, just align the data types properly
instead of making every single access site pay the price.

Just fix the CPP test to handle 32-bit platforms with slow
mis-alignment handling, everything else seems to be working properly
after I fixed the NMI issues on sparc64.
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