lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Wed, 07 Apr 2010 16:22:43 -0700
From:	Yinghai <yinghai.lu@...cle.com>
To:	Bjorn Helgaas <bjorn.helgaas@...com>,
	"H. Peter Anvin" <hpa@...or.com>
CC:	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>, linux-pci@...r.kernel.org,
	x86@...nel.org, linux-kernel@...r.kernel.org,
	Andy Isaacson <adi@...apodia.org>,
	Thomas Renninger <trenn@...e.de>
Subject: Re: [PATCH] x86: Reserve legacy VGA MMIO area for x86_64 as well
 as x86_32

On 04/07/2010 04:05 PM, Bjorn Helgaas wrote:
> On Wednesday 07 April 2010 04:45:30 pm Yinghai wrote:
>> On 04/07/2010 02:06 PM, Bjorn Helgaas wrote:
>>>
>>> Currently, we only reserve the legacy VGA area [mem 0xa0000-0xbffff] on
>>> x86_32.  But this legacy area is also used on x86_64, so this patch
>>> reserves it there, too.
>>>
>>> If we don't reserve it, we may mistakenly move a PCI device to that area,
>>> as we did here:
>>>
>>>   pci_root PNP0A03:00: host bridge window [mem 0xff980800-0xff980bff]
>>>   pci_root PNP0A03:00: host bridge window [mem 0xff97c000-0xff97ffff]
>>>   pci 0000:00:1f.2: no compatible bridge window for [mem 0xff970000-0xff9707ff]
>>>   pci 0000:00:1f.2: BAR 5: assigned [mem 0x000a0000-0x000a07ff]
>>>
>>> as reported by Andy Isaacson at http://lkml.org/lkml/2010/4/6/375
>>>
>>> I think the fact that the BAR is not within a host bridge window is a
>>> BIOS defect, and it's now more visible because we have "pci=use_crs" as
>>> the default.  Using "pci=nocrs" is a workaround, because then we won't
>>> attempt to move the device.
>>
>> that doesn't look right.
>>
>> It seem another thread, erission has one model without VGA, and they use that area for other device MMIO.
>>
>> current for 64bit, We remove [0xa0000, 0x100000) from e820 map if those area is E820_RAM.
>>
>> in e820_reserve_resources(), kernel will reserve range < 1M according to e820 map.
>> that is before pci BAR is claimed.
>>
>> or you can add
>> boot_params.screen_info.orig_video_isVGA == 1
>> or double check scan pci tree to see if video is there or not
> 
> I'm sorry, I can't understand what you're saying.

for 64 bit, you may check boot_params.screen_info.orig_video_isVGA to see if you need to reserve that VGA range.
not sure if every bootloader fill that...

> 
> It seems like you're saying we already have a mechanism to keep us
> from assigning that VGA range to another device, but obviously it's
> not working.
> 
> Maybe it will be clearer if you propose a different patch that prevents
> us from assigning 0xa0000 to the USB controller.

when the system only have one peer root bus, can you skip the _CRS for it?

YH
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ