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Message-ID: <87633xayk4.fsf@basil.nowhere.org>
Date: Mon, 12 Apr 2010 10:02:19 +0200
From: Andi Kleen <andi@...stfloor.org>
To: Colin King <colin.king@...onical.com>
Cc: Ingo Molnar <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86: Disable 4MB page tables for Atom, work around errata AAE44
Colin King <colin.king@...onical.com> writes:
>
> +static void __init check_atom(void)
> +{
> +
> + /*
> + * Disable 4MB page tables to work around Intel errata AAE44 for
> + * Atom. We cannot guarantee stopping undefined processor behaviour
> + * when two pageing structure translations differ with respect to
> + * page frame sizes. Hence, for Atoms we disable the PSE.
> + */
> + if (boot_cpu_data.x86_model == 0x1c) {
Perhaps someone else pointed that out already, but you obviously
need to check for x86_vendor == X86_VENDOR_INTEL and x86_family == 6 too,
otherwise you'll get false positives.
Besides such workarounds are normally in arch/x86/kernel/cpu/intel.c.
bugs.c is really obsolete.
-Andi
--
ak@...ux.intel.com -- Speaking for myself only.
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