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Message-ID: <0D753D10438DA54287A00B0270842697636D62B002@AUSP01VMBX24.collaborationhost.net>
Date: Wed, 14 Apr 2010 18:29:17 -0500
From: H Hartley Sweeten <hartleys@...ionengravers.com>
To: Linux Kernel <linux-kernel@...r.kernel.org>
CC: Greg KH <greg@...ah.com>, "ss@....gov.au" <ss@....gov.au>
Subject: [PATCH] staging/dt3155: fix 50Hz configuration
According to the header file, dt3155_io.h, the 50/60 Hz configuration
is controlled by a bit in the I2C CSR2 register (bit 2). The function
dt3155_init_isr actually reads the I2C CONFIG register into the global
I2C_CSR union variable then modifies the bit. It then does a write
to the I2C CONFIG register with the global I2C_CONFIG union variable
which is not even set with a value anywhere in the driver.
My guess is 50Hz operation doesn't even work as-is.
Fix this by actually reading and writing the correct register with
the correct value.
Signed-off-by: H Hartley Sweeten <hsweeten@...ionengravers.com>
Cc: Greg Kroah-Hartman <gregkh@...e.de>
Cc: Simon Horman <horms@...ge.net.au>
---
diff --git a/drivers/staging/dt3155/dt3155_drv.c b/drivers/staging/dt3155/dt3155_drv.c
index a67c622..8c43284 100644
--- a/drivers/staging/dt3155/dt3155_drv.c
+++ b/drivers/staging/dt3155/dt3155_drv.c
@@ -472,9 +472,9 @@ static void dt3155_init_isr(int minor)
/* 50/60 Hz should be set before this point but let's make sure it is */
/* right anyway */
- ReadI2C(dt3155_lbase[ minor ], CONFIG, &i2c_csr2.reg);
+ ReadI2C(dt3155_lbase[ minor ], CSR2, &i2c_csr2.reg);
i2c_csr2.fld.HZ50 = FORMAT50HZ;
- WriteI2C(dt3155_lbase[ minor ], CONFIG, i2c_config.reg);
+ WriteI2C(dt3155_lbase[ minor ], CSR2, i2c_csr2.reg);
/* enable busmaster chip, clear flags */
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