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Message-Id: <1271349663-16670-5-git-send-email-bp@amd64.org>
Date: Thu, 15 Apr 2010 18:41:02 +0200
From: Borislav Petkov <bp@...64.org>
To: <hpa@...or.com>, <mingo@...e.hu>, <tglx@...utronix.de>
Cc: <x86@...nel.org>, <linux-kernel@...r.kernel.org>,
Frank Arnold <frank.arnold@....com>,
Borislav Petkov <borislav.petkov@....com>
Subject: [PATCH 4/5] x86, cacheinfo: Make L3 cache info per node
From: Borislav Petkov <borislav.petkov@....com>
Currently, we're allocating L3 cache info and calculating indices for
each online cpu which is clearly superfluous. Instead, we need to do
this per-node as is each L3 cache.
No functional change, only per-cpu memory savings.
Signed-off-by: Borislav Petkov <borislav.petkov@....com>
---
arch/x86/kernel/cpu/intel_cacheinfo.c | 49 +++++++++++++++++++++++---------
1 files changed, 35 insertions(+), 14 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index ff663ca..c42b5c5 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -307,19 +307,20 @@ struct _cache_attr {
};
#ifdef CONFIG_CPU_SUP_AMD
+
+/* max 8 nodes on a system */
+static struct amd_l3_cache * __cpuinitdata l3_caches[8];
+
+/*
+ * We're called over smp_call_function_single() and
+ * therefore are on the correct cpu.
+ */
static void __cpuinit amd_calc_l3_indices(struct amd_l3_cache *l3)
{
- /*
- * We're called over smp_call_function_single() and therefore
- * are on the correct cpu.
- */
- int cpu = smp_processor_id();
- int node = cpu_to_node(cpu);
- struct pci_dev *dev = node_to_k8_nb_misc(node);
unsigned int sc0, sc1, sc2, sc3;
u32 val = 0;
- pci_read_config_dword(dev, 0x1C4, &val);
+ pci_read_config_dword(l3->dev, 0x1C4, &val);
/* calculate subcache sizes */
l3->subcaches[0] = sc0 = !(val & BIT(0));
@@ -328,13 +329,31 @@ static void __cpuinit amd_calc_l3_indices(struct amd_l3_cache *l3)
l3->subcaches[3] = sc3 = !(val & BIT(12)) + !(val & BIT(13));
l3->indices = (max(max(max(sc0, sc1), sc2), sc3) << 10) - 1;
+}
+
+static struct amd_l3_cache * __cpuinit amd_init_l3_cache(int node)
+{
+ struct amd_l3_cache *l3;
+ struct pci_dev *dev = node_to_k8_nb_misc(node);
+
+ l3 = kzalloc(sizeof(struct amd_l3_cache), GFP_ATOMIC);
+ if (!l3) {
+ printk(KERN_WARNING "Error allocating L3 struct\n");
+ return NULL;
+ }
l3->dev = dev;
+
+ amd_calc_l3_indices(l3);
+
+ return l3;
}
static void __cpuinit
amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
{
+ int node;
+
if (boot_cpu_data.x86 != 0x10)
return;
@@ -355,14 +374,16 @@ amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
if (num_k8_northbridges == 0)
return;
- this_leaf->l3 = kzalloc(sizeof(struct amd_l3_cache), GFP_ATOMIC);
- if (!this_leaf->l3) {
- printk(KERN_WARNING "Error allocating L3 struct\n");
- return;
+ node = amd_get_nb_id(smp_processor_id());
+
+ if (!l3_caches[node]) {
+ l3_caches[node] = amd_init_l3_cache(node);
+ l3_caches[node]->can_disable = true;
}
- this_leaf->l3->can_disable = true;
- amd_calc_l3_indices(this_leaf->l3);
+ WARN_ON(!l3_caches[node]);
+
+ this_leaf->l3 = l3_caches[node];
}
static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
--
1.7.1.rc1
--
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