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Date:	Mon, 19 Apr 2010 21:21:53 +0530
From:	kishore kadiyala <kishorek.kadiyala@...il.com>
To:	Madhusudhan <madhu.cr@...com>
Cc:	Nishanth Menon <nm@...com>, felipe.balbi@...ia.com,
	me@...ipebalbi.com, Vimal Singh <vimal.newwork@...il.com>,
	tony@...mide.com, "S, Venkatraman" <svenkatr@...com>,
	linux-omap@...r.kernel.org, linux-kernel@...r.kernel.org,
	"Lavinen Jarkko (Nokia-D/Helsinki)" <jarkko.lavinen@...ia.com>
Subject: [PATCH v4] OMAP: Fix for bus width which improves SD card's 
	peformance.

The previous patch was Line wrapped , resending
correct patch.
NM, Sorry I miss spelled your name correcting this time.

Regards,
Kishore

From: Kishore Kadiyala <kishore.kadiyala@...com>

This patch improves low speeds for SD cards.
OMAP-MMC controller's can support maximum bus width of '8'.
when bus width is mentioned as "8" in controller data,the SD
stack will check whether bus width is "4" and if not it will
set bus width to "1" and there by degrading performance.
This patch fixes the issue and improves the performance of
SD cards.

Signed-off-by: Kishore Kadiyala <kishore.kadiyala@...com>
Signed-off-by: Venkatraman S <svenkatr@...com>
Signed-off-by: Nishanth Menon <nm@...com>
Acked-by: Madhusudhan Chikkature <madhu.cr@...com>
Tested-by: Jarkko Nikula <jhnikula@...il.com>
---
In V4 : Updated with Nishant's comments and appened his Signed-off
In V3 : Updated  with Madhu's comments  and appended Tested by Nikula
In V2 : Appended Signed-off by Venkat and Ack by Madhu

 Here are my experiment numbers, on a Class 6 SDHC card:
 Read peformance is increased by 220%
 Write Performance is increased by 52%

 drivers/mmc/host/omap_hsmmc.c |   19 ++++++++++++++++---
 1 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 8c97c22..9c1a60e 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -2091,10 +2091,23 @@ static int __init omap_hsmmc_probe(struct
	mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
 		     MMC_CAP_WAIT_WHILE_BUSY;

-	if (mmc_slot(host).wires >= 8)
-		mmc->caps |= (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA);
-	else if (mmc_slot(host).wires >= 4)
+	switch (mmc_slot(host).wires) {
+	case 8:
+		mmc->caps |= MMC_CAP_8_BIT_DATA;
+		/* Fall through */
+	case 4:
 		mmc->caps |= MMC_CAP_4_BIT_DATA;
+		break;
+	case 1:
+		/* Nothing to crib here */
+	case 0:
+		/* Assuming nothing was given by board, Core use's 1-Bit */
+		 break;
+	default:
+		/* Completely unexpected.. Core goes with 1-Bit Width */
+		dev_crit(mmc_dev(host->mmc), "Invalid width %d\n used!"
+			"using 1 instead\n", mmc_slot(host).wires);
+	}

 	if (mmc_slot(host).nonremovable)
 		mmc->caps |= MMC_CAP_NONREMOVABLE;
-- 
1.6.3.3
--
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