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Message-ID: <1272958808.5605.126.camel@twins>
Date: Tue, 04 May 2010 09:40:08 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Michael Cree <mcree@...on.net.nz>
Cc: linux-kernel@...r.kernel.org, Paul Mackerras <paulus@...ba.org>,
Ingo Molnar <mingo@...e.hu>,
Arnaldo Carvalho de Melo <acme@...hat.com>,
Richard Henderson <rth@...ddle.net>,
Ivan Kokshaysky <ink@...assic.park.msu.ru>,
Matt Turner <mattst88@...il.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Thomas Gleixner <tglx@...utronix.de>,
linux-alpha@...r.kernel.org
Subject: Re: [PATCH 3/3] alpha: Implement HW performance events on the EV67
and later CPUs.
On Sat, 2010-05-01 at 11:55 +1200, Michael Cree wrote:
> +/* I wonder what this is for ??? */
> +void set_perf_event_pending(void)
> +{
> +}
If the PMU Interrupt comes in as an NMI we cannot take locks and such
from its handler. So what we do is queue that work to be ran later. The
kernel has a fallback to run this stuff from the timer hardirq, but if
the PMI is IRQ context (like ARM) you can simply call
perf_event_do_pending() at its tail.
Alternatively you can self-IPI like x86 does and run
perf_event_do_pending() from there.
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