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Message-ID: <1273560616.5605.3429.camel@twins>
Date:	Tue, 11 May 2010 08:50:16 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Corey Ashford <cjashfor@...ux.vnet.ibm.com>
Cc:	Lin Ming <ming.m.lin@...el.com>, Ingo Molnar <mingo@...e.hu>,
	Frederic Weisbecker <fweisbec@...il.com>,
	"eranian@...il.com" <eranian@...il.com>,
	"Gary.Mohr@...l.com" <Gary.Mohr@...l.com>,
	"arjan@...ux.intel.com" <arjan@...ux.intel.com>,
	"Zhang, Yanmin" <yanmin_zhang@...ux.intel.com>,
	Paul Mackerras <paulus@...ba.org>,
	"David S. Miller" <davem@...emloft.net>,
	Russell King <rmk+kernel@....linux.org.uk>,
	Paul Mundt <lethal@...ux-sh.org>,
	lkml <linux-kernel@...r.kernel.org>
Subject: Re: [RFC][PATCH 3/9] perf: export registerred pmus via sysfs

On Mon, 2010-05-10 at 16:54 -0700, Corey Ashford wrote:
> 
> Just to give a concrete example, the IBM Wire-Speed Processor has four
> AT-"nodes" per chip, each containing four PowerPC cores.
> 
> Those four nodes together share a number of nest PMU accelerators, I/O
> devices, buses etc. which each have their own PMUs.  Further adding to
> the structure is that some of the nodes are replicated.  For example,
> we have two memory controllers, each with a pair of PMUs.
> 
> /sys/devices/system/node/node0/mem_ctlr0/
>                                         event_source_id
>                                         events/
>                                               partial_cacheline_read_retried/
>                                               partial_cacheline_write_retried/
>                                               ...
>                                mem_ctlr1/
>                                         event_source_id
>                                         events/
>                                               partial_cacheline_read_retried/
>                                               ...
> 
> So it's a bit ugly to replicate the event information across identical
> pmus, but that can be done via links, without too much memory cost, I
> assume.
> 
> Does this seem workable? 

If you really have two memory controllers per node, I guess so. Sounds
strange to me though, typically a memory controller is the node
boundary.

But like I said in the other email, use a 1:n pmu:event_source ratio and
simply stick then in the machine/device topology wherever they belong,
if that ends up with multiple PMUs at one particular level, so be it.


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