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Message-ID: <alpine.DEB.2.00.1005111520260.1500@router.home>
Date: Tue, 11 May 2010 15:21:53 -0500 (CDT)
From: Christoph Lameter <cl@...ux.com>
To: Mike Frysinger <vapier.adi@...il.com>
cc: Matt Mackall <mpm@...enic.com>,
Pekka Enberg <penberg@...helsinki.fi>,
Dmitry Torokhov <dmitry.torokhov@...il.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Oskar Schirmer <os@...ix.com>,
Michael Hennerich <Michael.Hennerich@...log.com>,
linux-input@...r.kernel.org, linux-kernel@...r.kernel.org,
Daniel Glöckner <dg@...ix.com>,
Oliver Schneidewind <osw@...ix.com>,
Johannes Weiner <jw@...ix.com>, Nick Piggin <npiggin@...e.de>,
David Rientjes <rientjes@...gle.com>
Subject: Re: [PATCH v3] ad7877: keep dma rx buffers in seperate cache lines
On Tue, 11 May 2010, Mike Frysinger wrote:
> and like i said, that doesnt sound like a reasonable solution when
> every single SPI driver (over 100 atm) out there is affected
If you are on an embedded arch then you can of course set the default
kmalloc alignment.
The requirement for kmalloc is that it returns memory that can be used for
DMA. If the arch can only DMA into cacheline aligned objects then the
correct method is to force kmalloc alignment to cacheline size.
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