linux-kernel - Re: [PATCH v2] [RESEND] Handle instruction cache maintenance fault properly

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Message-ID: <1273662087.23818.63.camel@e102109-lin.cambridge.arm.com>
Date:	Wed, 12 May 2010 12:01:27 +0100
From:	Catalin Marinas <catalin.marinas@....com>
To:	"Kirill A. Shutemov" <kirill@...temov.name>
Cc:	Russell King <linux@....linux.org.uk>,
	Siarhei Siamashka <siarhei.siamashka@...ia.com>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Aaro Koskinen <aaro.koskinen@...ia.com>,
	Valdis.Kletnieks@...edu
Subject: Re: [PATCH v2] [RESEND] Handle instruction cache maintenance fault
 properly

On Tue, 2010-05-11 at 11:33 +0100, Kirill A. Shutemov wrote:
> Between "clean D line..." and "invalidate I line" operations in
> v7_coherent_user_range(), the memory page may get swapped out.
> And the fault on "invalidate I line" could not be properly handled
> causing the oops.
> 
> In ARMv6 "external abort on linefetch" replaced by "instruction cache
> maintenance fault". Let's handle it as translation fault. It fixes the
> issue.
> 
> I'm not sure if it's reasonable to check arch version in run-time.
> Let's do it in compile time for now.
> 
> Signed-off-by: Siarhei Siamashka <siarhei.siamashka@...ia.com>
> Signed-off-by: Kirill A. Shutemov <kirill@...temov.name>

FWIW:

Reviewed-by: Catalin Marinas <catalin.marinas@....com>

-- 
Catalin

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