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Message-Id: <20100512105907H.fujita.tomonori@lab.ntt.co.jp>
Date: Wed, 12 May 2010 10:58:42 +0900
From: FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>
To: penberg@...helsinki.fi
Cc: vapier.adi@...il.com, cl@...ux.com, mpm@...enic.com,
dmitry.torokhov@...il.com, akpm@...ux-foundation.org, os@...ix.com,
Michael.Hennerich@...log.com, linux-input@...r.kernel.org,
linux-kernel@...r.kernel.org, dg@...ix.com, osw@...ix.com,
jw@...ix.com, npiggin@...e.de, rientjes@...gle.com,
dbrownell@...rs.sourceforge.net, grant.likely@...retlab.ca
Subject: Re: [PATCH v3] ad7877: keep dma rx buffers in seperate cache lines
On Wed, 12 May 2010 00:01:02 +0300
Pekka Enberg <penberg@...helsinki.fi> wrote:
> Mike Frysinger wrote:
> > On Tue, May 11, 2010 at 16:46, Christoph Lameter wrote:
> >> On Tue, 11 May 2010, Mike Frysinger wrote:
> >>>> DMA. If the arch can only DMA into cacheline aligned objects then the
> >>>> correct method is to force kmalloc alignment to cacheline size.
> >>> these are SPI drivers and are usable on any arch that supports a SPI
> >>> bus (which is pretty much every arch). forget about "embedded"
> >>> arches.
> >>>
> >>> the issue here is simple: a SPI driver (AD7877) needs to do a receive
> >>> SPI transfer into a DMA safe buffer. what is the exact API to
> >>> dynamically allocate memory for the structure with this buffer
> >>> embedded in it such that the start of the structure is cached aligned
> >>> ? creating a dedicated kmem cache may work, but it isnt a scalable
> >>> solution if every SPI driver needs to create its own cache.
> >> kmalloc returns a pointer to a DMA safe buffer. There is no requirement on
> >> the x86 hardware that the DMA buffers have to be cache aligned. Cachelines
> >> will be invalidated as needed.
> >
> > so this guarantee is made by the kmalloc() API ? and for arches where
> > the cacheline invalidation is handled in software rather than
> > hardware, they must declare a min alignment value for kmalloc to be at
> > least as big as their cache alignment ?
> >
> > does the phrase "DMA safe buffer" imply cache alignment ?
>
> Yes, you should be able to DMA into kmalloc'd memory. IIRC the block or
> the SCSI layer depends on that.
Yeah, SCSI subsystem and drivers, and block drivers depend on it.
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