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Message-ID: <4BEC5C6A.7040205@zytor.com>
Date:	Thu, 13 May 2010 13:09:14 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Bjorn Helgaas <bjorn.helgaas@...com>
CC:	Mike Habeck <habeck@....com>, Mike Travis <travis@....com>,
	Ingo Molnar <mingo@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org,
	Jesse Barnes <jbarnes@...tuousgeek.org>,
	Jacob Pan <jacob.jun.pan@...el.com>, Tejun Heo <tj@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Yinghai <yinghai.lu@...cle.com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	Myron Stowe <myron.stowe@...com>
Subject: Re: [Patch 1/1] x86 pci: Add option to not assign BAR's if not already
 assigned

On 05/13/2010 01:02 PM, Bjorn Helgaas wrote:
> 
> Yep, that's definitely a problem, and I don't have a good solution.
> 
> HP (and probably SGI) had a nice hardware solution for ia64 --
> address translation across the host bridge, so each bridge could
> have its own 64K I/O space.  But I don't see that coming in the
> x86 PC arena.
> 

I would agree, that is unlikely (not that I have any information on this
subject, mind you.)  Much more likely would be a bridge extension
capability for finer-grained I/O space routing.

	-hpa
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