linux-kernel - Re: Performance Events hangs with Intel P4 system

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Message-ID: <AANLkTimJV-rocIoSzzwuR9sqytM12xH-KZHsihgHss4l@mail.gmail.com>
Date:	Sat, 15 May 2010 00:03:28 +0530
From:	Jaswinder Singh Rajput <jaswinderlinux@...il.com>
To:	Cyrill Gorcunov <gorcunov@...il.com>
Cc:	Ingo Molnar <mingo@...e.hu>, Lin Ming <ming.m.lin@...el.com>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Frederic Weisbecker <fweisbec@...il.com>
Subject: Re: Performance Events hangs with Intel P4 system

Hello Cyrill,

On Fri, May 14, 2010 at 11:31 PM, Cyrill Gorcunov <gorcunov@...il.com> wrote:
>
>
> Jaswinder, could you give this patch a shot so that I will be
> able to put your tested-by tag and send it upstream? (it's slightly
> tuned from previous but should be same on bin level). This GP
> issue need to be fixed before any other things.
>
>        -- Cyrill
> ---
>  arch/x86/kernel/cpu/perf_event_p4.c |    8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> Index: linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
> =====================================================================
> --- linux-2.6.git.orig/arch/x86/kernel/cpu/perf_event_p4.c
> +++ linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
> @@ -18,7 +18,7 @@
>  struct p4_event_bind {
>        unsigned int opcode;                    /* Event code and ESCR selector */
>        unsigned int escr_msr[2];               /* ESCR MSR for this event */
> -       unsigned char cntr[2][P4_CNTR_LIMIT];   /* counter index (offset), -1 on abscence */
> +       char cntr[2][P4_CNTR_LIMIT];            /* counter index (offset), -1 on abscence */
>  };
>
>  struct p4_cache_event_bind {
> @@ -747,11 +747,11 @@ static int p4_get_escr_idx(unsigned int
>  static int p4_next_cntr(int thread, unsigned long *used_mask,
>                        struct p4_event_bind *bind)
>  {
> -       int i = 0, j;
> +       int i, j;
>
>        for (i = 0; i < P4_CNTR_LIMIT; i++) {
> -               j = bind->cntr[thread][i++];
> -               if (j == -1 || !test_bit(j, used_mask))
> +               j = bind->cntr[thread][i];
> +               if (j != -1 && !test_bit(j, used_mask))
>                        return j;
>        }
>
>

Yes, this patch fixes the GP issue.

Thanks,
--
Jaswinder Singh.
--
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