linux-kernel - Re: [Patch 1/1] x86 pci: Add option to not assign BAR's if not already assigned

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Message-ID: <4BEE0623.9010801@sgi.com>
Date:	Fri, 14 May 2010 19:25:39 -0700
From:	Mike Travis <travis@....com>
To:	"H. Peter Anvin" <hpa@...or.com>
CC:	Jesse Barnes <jbarnes@...tuousgeek.org>,
	Bjorn Helgaas <bjorn.helgaas@...com>,
	Mike Habeck <habeck@....com>, Ingo Molnar <mingo@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org,
	Jacob Pan <jacob.jun.pan@...el.com>, Tejun Heo <tj@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Yinghai <yinghai.lu@...cle.com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	Myron Stowe <myron.stowe@...com>
Subject: Re: [Patch 1/1] x86 pci: Add option to not assign BAR's if not already
 assigned

... We're somewhat fortunate in that our Legacy I/O
> devices are confined to those on the first blade, and all of these
> other devices are on other blades (PCI segments 1+).


By "somewhat" I meant we'd be way more fortunate without the
legacy I/O devices at all!  But hpa is right, 4 lines of
assembler is way better than (900?) lines of C.

My feeling is that if a CPU needs legacy i/o it should be
built into the chip.  HAH!  ;-)

The BIOS should just list the machine resources, in a
"non-BIOS" way, (oh wait, that's ACPI! :*)

Cheers!
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