lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Mon, 17 May 2010 23:15:32 +0530 From: Sundar R Iyer <sundar.iyer@...ricsson.com> To: Mark Brown <broonie@...nsource.wolfsonmicro.com> Cc: Deepak Sikri <deepak.sikri79@...il.com>, Viresh KUMAR <viresh.kumar@...com>, Rajeev KUMAR <rajeev-dlh.kumar@...com>, Armando VISCONTI <armando.visconti@...com>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, Vipin KUMAR <vipin.kumar@...com>, Shiraz HASHIM <shiraz.hashim@...com>, "linux-pm@...ts.linux-foundation.org" <linux-pm@...ts.linux-foundation.org>, Linus WALLEIJ <linus.walleij@...ricsson.com>, STEricsson_nomadik_linux <STEricsson_nomadik_linux@...t.st.com> Subject: Re: [linux-pm] Power Domain Framework Hello, > This implementation is assuming that the implementation in hardware only > has two levels, and that the decision to go to the higher level is done > by a simple or of requests for the full level from the consumers. I'm > not convinced that this will be true in general, or that it's always > going to be true that the different power domains are all isolated from > each other. There doesn't seem to be any immediate reason why hardware > won't ever implement more than two modes, and I'm not convinced that the > straight or of requests will always be sufficient to determine the Yes. Two modes is not the only level that hardware can support. An ideal case is Full OPP/Half OPP (which is the normal operating point)/Retention(which is the least so that the device is on). > operating mode for the entire power domain. For example, I can see > hardware requiring that if more than a given number of blocks are > enabled at any level a higher operating point is selected. Hmm...very much possible. Need to think on this further. > Are you sure that this interface is sufficiently general to work with > all hardware, not just your own? How does this map on to the OMAP or SH > hardware, for example? AFAIK and with my experience (and my current memory) with TI Davinci arch, most of the power domains are simpler ones with on/off and possibly some retention too. And the latest TI code also exposes domains with on/off/retention states. So, I think if we make this sturdy, I dont see any reason why we cannot map any generic architecture. CCing Kevin for his inputs. This is one of the most important aspect for such a change in the regulator framework: bringing in the domain aspect can encourage all newer (possibly older) architectures to come under a generic umbrella. Anyways, let me have a bit more on the "number of blocks" thing! Regards, Sundar -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists