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Message-Id: <1274174954.22793.17.camel@minggr.sh.intel.com>
Date:	Tue, 18 May 2010 17:29:14 +0800
From:	Lin Ming <ming.m.lin@...el.com>
To:	Cyrill Gorcunov <gorcunov@...il.com>, Ingo Molnar <mingo@...e.hu>
Cc:	lkml <linux-kernel@...r.kernel.org>
Subject: [PATCH] x86,perf: P4 PMU -- fix misprint in unflagged nmi handling

From: Cyrill Gorcunov <gorcunov@...nvz.org>
Subject: [PATCH] x86,perf: P4 PMU -- fix misprint in unflagged nmi handling

Tested-by: Lin Ming <ming.m.lin@...el.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@...nvz.org>
---
 arch/x86/kernel/cpu/perf_event_p4.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index f44ce8d..e695795 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -473,7 +473,7 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)
 	rdmsr(hwc->config_base + hwc->idx, low, high);
 
 	/* we need to check high bit for unflagged overflows */
-	if ((low & P4_CCCR_OVF) || (high & (1 << 31))) {
+	if ((low & P4_CCCR_OVF) || !(high & (1 << 31))) {
 		overflow = 1;
 		(void)checking_wrmsrl(hwc->config_base + hwc->idx,
 			((u64)low) & ~P4_CCCR_OVF);


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