linux-kernel - Re: [PATCH] x86, MCE, fix MSR_IA32_MCI

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Message-ID: <4BF1EF62.5020101@zytor.com>
Date:	Mon, 17 May 2010 18:37:38 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Huang Ying <ying.huang@...el.com>
CC:	Ingo Molnar <mingo@...e.hu>, Andi Kleen <ak@...ux.intel.com>,
	Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86, MCE, fix MSR_IA32_MCI_CTL2 CMCI threshold setup

On 05/17/2010 05:51 PM, Huang Ying wrote:
> Hi, Peter,
> 
> Thanks for review.
> 
> On Tue, 2010-05-18 at 01:59 +0800, H. Peter Anvin wrote:
>> On 05/17/2010 01:08 AM, Huang Ying wrote:
>>> It is reported that CMCI is not raised when number of corrected error
>>> reaches preset threshold. After inspection, it is found that
>>> MSR_IA32_MCI_CTL2 threshold field is not setup properly. This patch
>>> fixed it.
>>>
>>>
>>> Changelog:
>>>
>>> v2:
>>>
>>> - Rename CMCI_EN to MCI_CTL2_CMCI_EN and CMCI_THRESHOLD_MASK to
>>>   MCI_CTL2_CMCI_THRESHOLD_MASK to make naming consistent.
>>>
>>
>> This looks like a mix of a renaming patch and new functionality.  Please
>> submit the renaming as a one patch and then the new functionality as a
>> second patch on top, otherwise it gets hard to see what is actually
>> going on.
>>
>> If I'm not mistaken, there are at least two functionality changes:
>>
>> +#define MCI_CTL2_CMCI_THRESHOLD_MASK	0x7fffULL
>> -#define CMCI_THRESHOLD_MASK		0xffffULL
>>
>> ... change of mask, and:
>>
>> -		val |= CMCI_EN | CMCI_THRESHOLD;
>> +		val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK;
>> +		val |= MCI_CTL2_CMCI_EN | CMCI_THRESHOLD;
>>
>> bit being cleared which wasn't before.
> 
> This means we need 3 patches?
> 

No, two patches is fine -- one for the rename (no binary changes) and
one for the functionality changes.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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