linux-kernel - [PATCH] [RFC] Save/restore MISC

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Message-Id: <201006071814.53583.linux@rainbow-software.org>
Date:	Mon, 7 Jun 2010 18:14:49 +0200
From:	Ondrej Zary <linux@...nbow-software.org>
To:	"Linux-pm mailing list" <linux-pm@...ts.linux-foundation.org>
Cc:	Kernel development list <linux-kernel@...r.kernel.org>,
	Alan Stern <stern@...land.harvard.edu>,
	"H. Peter Anvin" <hpa@...or.com>, Len Brown <len.brown@...el.com>,
	Pavel Machek <pavel@....cz>, "Rafael J. Wysocki" <rjw@...k.pl>
Subject: [PATCH] [RFC] Save/restore MISC_ENABLE register

Save/restore MISC_ENABLE register on suspend/resume.
This fixes OOPS (invalid opcode) on resume from STR on Asus P4P800-VM, which
wakes up with MWAIT disabled.

Is this a correct thing to do? Is it OK on x86_64?

Signed-off-by: Ondrej Zary <linux@...nbow-software.org>

diff -urp linux-2.6.35-rc1-git2-orig/arch/x86/include/asm/suspend_32.h linux-2.6.35-rc1-git2/arch/x86/include/asm/suspend_32.h
--- linux-2.6.35-rc1-git2-orig/arch/x86/include/asm/suspend_32.h	2010-05-30 22:21:02.000000000 +0200
+++ linux-2.6.35-rc1-git2/arch/x86/include/asm/suspend_32.h	2010-06-04 23:52:22.000000000 +0200
@@ -15,6 +15,7 @@ static inline int arch_prepare_suspend(v
 struct saved_context {
 	u16 es, fs, gs, ss;
 	unsigned long cr0, cr2, cr3, cr4;
+	unsigned long misc_enable;
 	struct desc_ptr gdt;
 	struct desc_ptr idt;
 	u16 ldt;
diff -urp linux-2.6.35-rc1-git2-orig/arch/x86/include/asm/suspend_64.h linux-2.6.35-rc1-git2/arch/x86/include/asm/suspend_64.h
--- linux-2.6.35-rc1-git2-orig/arch/x86/include/asm/suspend_64.h	2010-05-30 22:21:02.000000000 +0200
+++ linux-2.6.35-rc1-git2/arch/x86/include/asm/suspend_64.h	2010-06-04 23:52:21.000000000 +0200
@@ -27,6 +27,7 @@ struct saved_context {
 	u16 ds, es, fs, gs, ss;
 	unsigned long gs_base, gs_kernel_base, fs_base;
 	unsigned long cr0, cr2, cr3, cr4, cr8;
+	unsigned long misc_enable;
 	unsigned long efer;
 	u16 gdt_pad;
 	u16 gdt_limit;
diff -urp linux-2.6.35-rc1-git2-orig/arch/x86/power/cpu.c linux-2.6.35-rc1-git2/arch/x86/power/cpu.c
--- linux-2.6.35-rc1-git2-orig/arch/x86/power/cpu.c	2010-05-30 22:21:02.000000000 +0200
+++ linux-2.6.35-rc1-git2/arch/x86/power/cpu.c	2010-06-04 23:50:52.000000000 +0200
@@ -105,6 +105,7 @@ static void __save_processor_state(struc
 	ctxt->cr4 = read_cr4();
 	ctxt->cr8 = read_cr8();
 #endif
+	rdmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable);
 }
 
 /* Needed by apm.c */
@@ -152,6 +153,7 @@ static void fix_processor_context(void)
  */
 static void __restore_processor_state(struct saved_context *ctxt)
 {
+	wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable);
 	/*
 	 * control registers
 	 */

-- 
Ondrej Zary
--
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