linux-kernel - Re: [PATCH 3/5] perf: New PERF_EVENT_STATE

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Date:	Thu, 10 Jun 2010 18:26:04 +0200
From:	Frederic Weisbecker <fweisbec@...il.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Ingo Molnar <mingo@...e.hu>, LKML <linux-kernel@...r.kernel.org>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Paul Mackerras <paulus@...ba.org>,
	Stephane Eranian <eranian@...gle.com>,
	Cyrill Gorcunov <gorcunov@...il.com>,
	Zhang Yanmin <yanmin_zhang@...ux.intel.com>,
	Steven Rostedt <rostedt@...dmis.org>
Subject: Re: [PATCH 3/5] perf: New PERF_EVENT_STATE_PAUSED event state

On Thu, Jun 10, 2010 at 12:55:17PM +0200, Peter Zijlstra wrote:
> On Thu, 2010-06-10 at 05:49 +0200, Frederic Weisbecker wrote:
> > This brings a new PERF_EVENT_STATE_PAUSED state. It means the events
> > is enabled but we don't want it to run, it must be in the same state
> > than after a pmu->stop() call. So the event has been reserved and
> > allocated and it is ready to start after a pmu->start() call.
> > 
> > It is deemed for hardware events when we want them to be reserved on
> > the cpu and ready to be started anytime. This is going to be useful
> > for the new context exclusion that will follow.
> > 
> > Signed-off-by: Frederic Weisbecker <fweisbec@...il.com>
> > Cc: Ingo Molnar <mingo@...e.hu>
> > Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
> > Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
> > Cc: Paul Mackerras <paulus@...ba.org>
> > Cc: Stephane Eranian <eranian@...gle.com>
> > Cc: Cyrill Gorcunov <gorcunov@...il.com>
> > Cc: Zhang Yanmin <yanmin_zhang@...ux.intel.com>
> > Cc: Steven Rostedt <rostedt@...dmis.org>
> > ---
> >  arch/x86/kernel/cpu/perf_event.c |    6 ++++--
> >  include/linux/perf_event.h       |    3 ++-
> >  kernel/perf_event.c              |    7 ++++---
> >  3 files changed, 10 insertions(+), 6 deletions(-)
> > 
> > diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
> > index f2da20f..9b0e52f 100644
> > --- a/arch/x86/kernel/cpu/perf_event.c
> > +++ b/arch/x86/kernel/cpu/perf_event.c
> > @@ -839,7 +839,8 @@ void hw_perf_enable(void)
> >  			    match_prev_assignment(hwc, cpuc, i))
> >  				continue;
> >  
> > -			x86_pmu_stop(event);
> > +			if (event->state != PERF_EVENT_STATE_PAUSED)
> > +				x86_pmu_stop(event);
> >  		}
> >  
> >  		for (i = 0; i < cpuc->n_events; i++) {
> > @@ -851,7 +852,8 @@ void hw_perf_enable(void)
> >  			else if (i < n_running)
> >  				continue;
> >  
> > -			x86_pmu_start(event);
> > +			if (event->state != PERF_EVENT_STATE_PAUSED)
> > +				x86_pmu_start(event);
> >  		}
> >  		cpuc->n_added = 0;
> >  		perf_events_lapic_init();
> 
> Also, I'd rather keep the whole event->state knowledge in the generic
> code.



Yeah, but if we do this, we need to maintain the exact same state in the
arch level. We need this for every pmus.

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