linux-kernel - [tip:x86/mce] x86, mce: Fix MSR_IA32_MCI

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Message-ID: <tip-3c417588603e5411f29d22a40f3b5ff71529a4f0@git.kernel.org>
Date:	Fri, 11 Jun 2010 06:04:03 GMT
From:	tip-bot for Huang Ying <ying.huang@...el.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, ying.huang@...el.com, hpa@...or.com,
	mingo@...hat.com, seto.hidetoshi@...fujitsu.com,
	tglx@...utronix.de, shaohui.zheng@...el.com
Subject: [tip:x86/mce] x86, mce: Fix MSR_IA32_MCI_CTL2 CMCI threshold setup

Commit-ID:  3c417588603e5411f29d22a40f3b5ff71529a4f0
Gitweb:     http://git.kernel.org/tip/3c417588603e5411f29d22a40f3b5ff71529a4f0
Author:     Huang Ying <ying.huang@...el.com>
AuthorDate: Tue, 8 Jun 2010 14:09:10 +0800
Committer:  H. Peter Anvin <hpa@...or.com>
CommitDate: Thu, 10 Jun 2010 21:27:36 -0700

x86, mce: Fix MSR_IA32_MCI_CTL2 CMCI threshold setup

It is reported that CMCI is not raised when number of corrected error
reaches preset threshold. After inspection, it is found that
MSR_IA32_MCI_CTL2 threshold field is not setup properly. This patch
fixed it.

Value of MCI_CTL2_CMCI_THRESHOLD_MASK is fixed according to x86_64
Software Developer's Manual too.

Reported-by: Shaohui Zheng <shaohui.zheng@...el.com>
Signed-off-by: Huang Ying <ying.huang@...el.com>
LKML-Reference: <1275977350.3444.660.camel@...ang-dev.sh.intel.com>
Reviewed-by: Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@...or.com>
---
 arch/x86/include/asm/mce.h             |    2 +-
 arch/x86/kernel/cpu/mcheck/mce_intel.c |    1 +
 2 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 82db1d8..c62c13c 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -40,7 +40,7 @@
 
 /* CTL2 register defines */
 #define MCI_CTL2_CMCI_EN		(1ULL << 30)
-#define MCI_CTL2_CMCI_THRESHOLD_MASK	0xffffULL
+#define MCI_CTL2_CMCI_THRESHOLD_MASK	0x7fffULL
 
 #define MCJ_CTX_MASK		3
 #define MCJ_CTX(flags)		((flags) & MCJ_CTX_MASK)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index faf7b29..6fcd093 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -102,6 +102,7 @@ static void cmci_discover(int banks, int boot)
 			continue;
 		}
 
+		val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK;
 		val |= MCI_CTL2_CMCI_EN | CMCI_THRESHOLD;
 		wrmsrl(MSR_IA32_MCx_CTL2(i), val);
 		rdmsrl(MSR_IA32_MCx_CTL2(i), val);
--
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