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Message-ID: <4C197A49.6020400@jp.fujitsu.com>
Date: Thu, 17 Jun 2010 10:28:41 +0900
From: Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
To: tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
linux-kernel@...r.kernel.org
CC: linux-pci@...r.kernel.org, macro@...ux-mips.org,
kamezawa.hiroyu@...fujitsu.com, eike-kernel@...tec.de
Subject: [BUG][PATCH 0/2 (v.2)] x86: ioremap() problem in X86_32 PAE
Hi,
Here is a updated version (v.2) of patchset to fix ioremap() problem
found in x86_32 PAE mode. The problem is that ioremap() maps wrong
address for the devices to which phisical addresses higer than 32-bit
are assigned (ioat device in my case).
Changelog
----
v.1 => v.2:
Thanks to the feedbacks, I found that some of my v.1 patches are totally
wrong because they were based on my mis-understanding about architectural
limit and linux memory management limit of physical address. In addition,
it turned out that there are bugs that handles physical address improperly
(higher 32-bits are cleared unexpectedly) also in the other places in the
ioremap() code path. Major changes are
- Removed wrong changes against phys_addr_valid() ([PATCH 2/4] in v.1).
- Removed wrong changes against wraning message in ioremap() ([PATCH 3/4]
in v.1)
- Changed not to use PHYSICAL_PAGE_MASK because the PHYSICAL_PAGE_MASK
would not work for physical address higher than 44-bit.
- Added fixes for remaining bugs of physical address handling in ioremap()
code path according to the feedbacks.
- Added a fix for s_show() in vmalloc.c to show high physical address properly.
----
I also found the bug in PCI MSI-X code that handles physical address
improperly, which causes the problem MSI-X doesn't work on my devices. I'll
send a patch for this to PCI mail list separately.
The v.2 patches are:
- [PATCH 1/2] x86: ioremap: fix wrong physical address handling
- [PATCH 2/2] x86: ioremap: fix normal ram range check
Thanks,
Kenji Kaneshige
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