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Message-ID: <SNT125-W601D37A89A8CBFFDFFF40EC3C00@phx.gbl>
Date: Thu, 17 Jun 2010 19:07:31 -0700
From: Yuhong Bao <yuhongbao_386@...mail.com>
To: <hpa@...or.com>, <kees.cook@...onical.com>
CC: <x86@...nel.org>, <linux-kernel@...r.kernel.org>,
<tglx@...utronix.de>, <mingo@...hat.com>, <tabbott@...lice.com>,
<sam@...nborg.org>, <heukelum@...tmail.fm>
Subject: RE: [PATCH] x86: clear XD_DISABLED flag on Intel to regain NX
> a) Not all Intel CPUs with extended CPUID levels have
> MSR_IA32_MISC_ENABLE bit 34. Since we can't take traps here we would
> have to know positively that we aren't going to trip on anything.
It won't as these older Intel CPUs are always going to read this bit as zero, and even if no checking for this is include all the wrmsr would do is write the same value back, which won't cause a trap.
Yuhong Bao
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