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Message-ID: <4C28C908.8090808@twiddle.net>
Date: Mon, 28 Jun 2010 09:08:40 -0700
From: Richard Henderson <rth@...ddle.net>
To: Michael Cree <mcree@...on.net.nz>
CC: Dave Airlie <airlied@...il.com>,
FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>,
mattst88@...il.com, linux-kernel@...r.kernel.org,
linux-alpha@...r.kernel.org, ink@...assic.park.msu.ru,
jbarnes@...tuousgeek.org, linux-pci@...r.kernel.org,
dri-devel@...ts.freedesktop.org, alexdeucher@...il.com,
jglisse@...hat.com
Subject: Re: Problems with alpha/pci + radeon/ttm
On 06/28/2010 02:03 AM, Michael Cree wrote:
> On 28/06/10 11:14, Dave Airlie wrote:
>> The bus error is caused by the kernel, its something alpha specific
>> with how mmap works,
>> I'm not sure if alpha needs some special mmap flags or something,
>
> Neither am I. All I know is that Alpha reorders CPU instructions more
> aggressively than most other architectures, the page map size is 8kB,
> and memory accesses must be aligned to the datum size.
There are no special mmap flags on alpha. The non-cacheable property
is a function of the physical address (e.g. bit 40 set for ev5), and
this has already been taken care of by the kernel.
r~
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