linux-kernel - Re: [PATCH -next] tile: set ARCH_KMALLOC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Tue, 29 Jun 2010 10:39:14 -0400
From:	Chris Metcalf <cmetcalf@...era.com>
To:	FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>
CC:	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH -next] tile: set ARCH_KMALLOC_MINALIGN

This sounds OK.   The TILE-Gx chip does coherent DMA, so won't need
this, I assume?  If you want to guard this suitably, you can add
"#ifndef __tilegx__" around it and add a comment that TILE-Gx has
coherent IO.  Thanks.

Acked-by: Chris Metcalf <cmetcalf@...era.com>

On 6/29/2010 3:43 AM, FUJITA Tomonori wrote:
> The minimum alignment and width of DMA is L2_CACHE_BYTES (because your
> dma_get_cache_alignment() returns L2_CACHE_BYTES), right?
>
> =
> From: FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>
> Subject: [PATCH -next] tile: set ARCH_KMALLOC_MINALIGN
>
> Architectures that handle DMA-non-coherent memory need to set
> ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
> the buffer doesn't share a cache with the others.
>
> Signed-off-by: FUJITA Tomonori <fujita.tomonori@....ntt.co.jp>
> ---
>  arch/tile/include/asm/cache.h |    2 ++
>  1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/arch/tile/include/asm/cache.h b/arch/tile/include/asm/cache.h
> index ee59714..e08d9e8 100644
> --- a/arch/tile/include/asm/cache.h
> +++ b/arch/tile/include/asm/cache.h
> @@ -31,6 +31,8 @@
>  #define L2_CACHE_BYTES		(1 << L2_CACHE_SHIFT)
>  #define L2_CACHE_ALIGN(x)	(((x)+(L2_CACHE_BYTES-1)) & -L2_CACHE_BYTES)
>  
> +#define ARCH_KMALLOC_MINALIGN	L2_CACHE_BYTES
> +
>  /* use the cache line size for the L2, which is where it counts */
>  #define SMP_CACHE_BYTES_SHIFT	L2_CACHE_SHIFT
>  #define SMP_CACHE_BYTES		L2_CACHE_BYTES
>   

-- 
Chris Metcalf, Tilera Corp.
http://www.tilera.com

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/