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Message-ID: <4C2D6D4B.5060309@cn.fujitsu.com>
Date:	Fri, 02 Jul 2010 12:38:35 +0800
From:	Xiao Guangrong <xiaoguangrong@...fujitsu.com>
To:	Avi Kivity <avi@...hat.com>
CC:	Marcelo Tosatti <mtosatti@...hat.com>,
	LKML <linux-kernel@...r.kernel.org>,
	KVM list <kvm@...r.kernel.org>
Subject: [PATCH] KVM: IOAPIC: only access APIC registers one dword at a time

The IOAPIC spec says:

When accessing these registers, accesses must be done one dword at a time.
For example, software should never access byte 2 from the Data register before
accessing bytes 0 and 1. The hardware will not attempt to recover from a bad
programming model in this case.

So, this patch removes other width access

Signed-off-by: Xiao Guangrong <xiaoguangrong@...fujitsu.com>
---
 virt/kvm/ioapic.c |   10 +++-------
 1 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
index 1149c60..f96816f 100644
--- a/virt/kvm/ioapic.c
+++ b/virt/kvm/ioapic.c
@@ -306,14 +306,10 @@ static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
 	spin_unlock(&ioapic->lock);
 
 	switch (len) {
-	case 8:
-		*(u64 *) val = result;
-		break;
-	case 1:
-	case 2:
 	case 4:
-		memcpy(val, (char *)&result, len);
+		*(u32 *) val = result;
 		break;
+
 	default:
 		printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 	}
@@ -332,7 +328,7 @@ static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
 		     (void*)addr, len, val);
 	ASSERT(!(addr & 0xf));	/* check alignment */
 
-	if (len == 4 || len == 8)
+	if (len == 4)
 		data = *(u32 *) val;
 	else {
 		printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
-- 
1.6.1.2

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