lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 15 Jul 2010 00:51:50 +0200
From:	Linus Walleij <linus.walleij@...ricsson.com>
To:	Mark Brown <broonie@...nsource.wolfsonmicro.com>
Cc:	Sundar R IYER <sundar.iyer@...ricsson.com>,
	Bengt JONSSON <bengt.g.jonsson@...ricsson.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	STEricsson_nomadik_linux <STEricsson_nomadik_linux@...t.st.com>,
	"lrg@...mlogic.co.uk" <lrg@...mlogic.co.uk>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"sameo@...ux.intel.com" <sameo@...ux.intel.com>
Subject: Re: [PATCH v2 2/2] ux500: add ab8500-regulators machine specific data

2010/7/14 Mark Brown <broonie@...nsource.wolfsonmicro.com>:

>> > This is normal, but for fairly obvious reasons the very lowest power
>> > states are generally handled outside of the regulator API at a hardware
>> > level via hardware signals to the regulator.  It's not normally part of
>> > the runtime constraints for use while the CPU is live.
>
>> Yes. But my point was that even at a lower level than kernel (BIOS/firmware?)
>> the switching would happen via SW. Please correct me if I am wrong!
>
> Well, ultimately it's always triggered by software but the actual signal
> to the regulator is often a logic level output by the SoC as the
> processor enters a low power state rather than an I2C/SPI write.

I can answer this: on the U300 we had such autonomous signals that
would augment the power state of the regulators by special sleep
signals.

For U8500 there is a dedicated autonomous system in the silicon, called
PRCMU (Power Reset Clock Management Unit) that will actually do
this using I2C because it has its own CPU and can transmit I2C
messages even when the ARM CPU cores are turned off. So this is
indeed a first-timer and not strange that it looks unfamiliar ...

Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists