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Message-ID: <tip-40e1d7a4ffee5cb17f5c36f4c3c4a011ab103ebe@git.kernel.org>
Date:	Tue, 20 Jul 2010 00:52:04 GMT
From:	tip-bot for Suresh Siddha <suresh.b.siddha@...el.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
	suresh.b.siddha@...el.com, tglx@...utronix.de, hpa@...ux.intel.com
Subject: [tip:x86/cpu] x86, cpu: Add xsaveopt cpufeature

Commit-ID:  40e1d7a4ffee5cb17f5c36f4c3c4a011ab103ebe
Gitweb:     http://git.kernel.org/tip/40e1d7a4ffee5cb17f5c36f4c3c4a011ab103ebe
Author:     Suresh Siddha <suresh.b.siddha@...el.com>
AuthorDate: Mon, 19 Jul 2010 16:05:51 -0700
Committer:  H. Peter Anvin <hpa@...ux.intel.com>
CommitDate: Mon, 19 Jul 2010 16:48:06 -0700

x86, cpu: Add xsaveopt cpufeature

Add cpu feature bit support for the XSAVEOPT instruction.

Signed-off-by: Suresh Siddha <suresh.b.siddha@...el.com>
LKML-Reference: <20100719230205.523204988@...-t61.sc.intel.com>
Signed-off-by: H. Peter Anvin <hpa@...ux.intel.com>
---
 arch/x86/include/asm/cpufeature.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 3ec9275..d5ea3e3 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -165,6 +165,7 @@
 #define X86_FEATURE_ARAT	(7*32+ 1) /* Always Running APIC Timer */
 #define X86_FEATURE_CPB		(7*32+ 2) /* AMD Core Performance Boost */
 #define X86_FEATURE_EPB		(7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */
+#define X86_FEATURE_XSAVEOPT	(7*32+4) /* "xsaveopt" Optimized Xsave */
 
 /* Virtualization flags: Linux defined, word 8 */
 #define X86_FEATURE_TPR_SHADOW  (8*32+ 0) /* Intel TPR Shadow */
--
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