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Message-ID: <20100721182108.5a22c822@schlenkerla.am.freescale.net>
Date:	Wed, 21 Jul 2010 18:21:08 -0500
From:	Scott Wood <scottwood@...escale.com>
To:	Andrew Morton <akpm@...ux-foundation.org>
CC:	Anton Vorontsov <avorontsov@...sta.com>,
	Peter Tyser <ptyser@...-inc.com>, linux-kernel@...r.kernel.org,
	Dave Jiang <djiang@...sta.com>, linuxppc-dev@...abs.org,
	Doug Thompson <dougthompson@...ssion.com>
Subject: Re: [PATCH v2] edac: mpc85xx: Add support for new MPCxxx/Pxxxx EDAC
 controllers

On Wed, 21 Jul 2010 15:39:33 -0700
Andrew Morton <akpm@...ux-foundation.org> wrote:

> On Fri, 16 Jul 2010 15:12:24 -0500
> Scott Wood <scottwood@...escale.com> wrote:
> 
> > > 
> > >  drivers/edac/mpc85xx_edac.c |    8 ++++++++
> > >  1 files changed, 8 insertions(+), 0 deletions(-)
> > > 
> > > diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
> > > index 52ca09b..3820879 100644
> > > --- a/drivers/edac/mpc85xx_edac.c
> > > +++ b/drivers/edac/mpc85xx_edac.c
> > > @@ -646,8 +646,12 @@ static struct of_device_id mpc85xx_l2_err_of_match[] = {
> > >  	{ .compatible = "fsl,mpc8555-l2-cache-controller", },
> > >  	{ .compatible = "fsl,mpc8560-l2-cache-controller", },
> > >  	{ .compatible = "fsl,mpc8568-l2-cache-controller", },
> > > +	{ .compatible = "fsl,mpc8569-l2-cache-controller", },
> > >  	{ .compatible = "fsl,mpc8572-l2-cache-controller", },
> > > +	{ .compatible = "fsl,p1020-l2-cache-controller", },
> > > +	{ .compatible = "fsl,p1021-l2-cache-controller", },
> > >  	{ .compatible = "fsl,p2020-l2-cache-controller", },
> > > +	{ .compatible = "fsl,p4080-l2-cache-controller", },
> > 
> > L2 on the p4080 is quite different from those other chips.  It's part
> > of the core, controlled by SPRs.
> 
> erm, was that an ack or a nack?

NACK, p4080 doesn't belong in this table, at least not its L2.

L3 on p4080 is similar to L2 on these other chips, though, and it
wouldn't take much to get this driver working on it -- but the match
table entry should wait until the differences are accommodated.

-Scott

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