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Message-ID: <4C49E041.8070009@codeaurora.org>
Date: Fri, 23 Jul 2010 12:32:33 -0600
From: Kenneth Heitke <kheitke@...eaurora.org>
To: Daniel Glöckner <dg@...ix.com>
CC: khali@...ux-fr.org, ben-linux@...ff.org,
linux-arm-msm@...r.kernel.org, sdharia@...eaurora.org,
Crane Cai <crane.cai@....com>,
Samuel Ortiz <sameo@...ux.intel.com>,
Linus Walleij <linus.walleij@...ricsson.com>,
Ralf Baechle <ralf@...ux-mips.org>,
srinidhi kasagar <srinidhi.kasagar@...ricsson.com>,
linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] i2c: Single-wire Serial Bus Interface for Qualcomm MSM
chipsets
Daniel Glöckner wrote:
> On 07/21/2010 07:52 PM, Kenneth Heitke wrote:
>> Unlike I2C, SSBI is a point-to-point connection, and therefore there is no
>> need to specify a slave device address. The SSBI implementation
>> overrides the slave device address to be a device register address
>> instead. This restricts the client drivers from using the SMBus
>> communication APIs unless they update the address field (addr) of the
>> i2c_client structure prior to every SMBus function call.
>
>
>> +static int
>> +i2c_ssbi_write_bytes(struct i2c_ssbi_dev *ssbi, struct i2c_msg *msg)
>> +{
>> + int ret = 0;
>> + u8 *buf = msg->buf;
>> + u16 len = msg->len;
>> + u16 addr = msg->addr;
>> +
>> + if (ssbi->controller_type == MSM_SBI_CTRL_SSBI2) {
>> + u32 mode2 = readl(ssbi->base + SSBI2_MODE2);
>> + writel(SSBI_MODE2_REG_ADDR_15_8(mode2, addr),
>> + ssbi->base + SSBI2_MODE2);
>> + }
>> +
>> + while (len) {
>
> Where do you set the address if controller_type == MSM_SBI_CTRL_SSBI?
>
> Daniel
>
>
The SSBI_MODE2_REG_ADDR register contains the upper 8-bits of the
address which is only supported by SSBI 2.0. The lower 8 address bits
are written as part of the SSBI_CMD_WRITE macro which is common for both
of the controller types.
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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