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Message-ID: <1281951234.6555.65.camel@minggr.sh.intel.com>
Date:	Mon, 16 Aug 2010 17:33:54 +0800
From:	Lin Ming <ming.m.lin@...el.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Ingo Molnar <mingo@...e.hu>,
	Robert Richter <robert.richter@....com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Don Zickus <dzickus@...hat.com>,
	Cyrill Gorcunov <gorcunov@...il.com>,
	"arjan@...ux.intel.com" <arjan@...ux.intel.com>,
	"Fu, Michael" <michael.fu@...el.com>
Subject: Re: perf, how to support multiple x86 hw pmus?

On Mon, 2010-08-16 at 17:12 +0800, Peter Zijlstra wrote:
> On Mon, 2010-08-16 at 16:39 +0800, Lin Ming wrote:
> > > After that and some patches adding per pmu contexts adding multiple
> > > hardware pmus should be simple.
> > 
> > I didn't see the per pmu contexts patches, are you still working on
> > them?
> > 
> Yes, although 3 weeks of holidays and a week of LinuxCon didn't help to
> finish that work ;-)
> 
> I hope to be back to that soon ;-)

Really thanks for your work, that makes uncore support much easier.

> 
> > > 
> > > uncore should not share any code with the regular pmu, since they're
> > > mostly unrelated.
> > 
> > But should they share code like collect_events, schedule_events,
> > x86_perf_event_set_period(with some modification) etc...?
> > 
> Maybe, I'd have to look at the uncore stuff again, I can't remember if
> it has much in the way of event scheduling constraints and if the
> counter programming is close enough to the regular pmu to make it worth
> sharing code over.

I looked at the Nehalem uncore stuff and it does not have event
constraints. Each event can be monitored with any uncore counter.

The counter programming is close to regular pmu. It has
PERFEVTSELx/GLOBAL_STATUS/GLOBAL_OVF_CTRL/FIXED_CTR_CTRL like regular
pmu.


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