[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20100823061922.GD29442@zhen-devel.sh.intel.com>
Date: Mon, 23 Aug 2010 14:19:22 +0800
From: Zhenyu Wang <zhenyuw@...ux.intel.com>
To: Takashi Iwai <tiwai@...e.de>
Cc: Eric Anholt <eric@...olt.net>, David Airlie <airlied@...ux.ie>,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] agp/intel: Fix dma mask for Sandybridge
On 2010.08.23 08:02:42 +0200, Takashi Iwai wrote:
>
> Also, I don't understand the logic of 40bit addr calculation:
>
> > static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,
> > dma_addr_t addr, int type)
> > {
> > /* Shift high bits down */
> > addr |= (addr >> 28) & 0xff;
>
> Isn't it 0xff0?
>
No. This depends on hw 32bit PTE format for sandybridge.
bit 31 bit 11 bit 4 bit 0
|<-physical addr 31:12->|<-physical addr 39:32->|<-cache ctl 3:1->|valid|
--
Open Source Technology Center, Intel ltd.
$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
Download attachment "signature.asc" of type "application/pgp-signature" (199 bytes)
Powered by blists - more mailing lists