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Message-ID: <20100827135303.GA5405@lenovo>
Date:	Fri, 27 Aug 2010 17:53:03 +0400
From:	Cyrill Gorcunov <gorcunov@...il.com>
To:	Lin Ming <ming.m.lin@...el.com>
Cc:	LKML <linux-kernel@...r.kernel.org>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Peter Zijlstra <peterz@...radead.org>,
	Ingo Molnar <mingo@...e.hu>
Subject: Re: [PATCH -tip] perf, x86, Pentium4: Add RAW events verification

On Fri, Aug 27, 2010 at 01:21:20PM +0800, Lin Ming wrote:
> On Thu, 2010-08-26 at 02:23 +0800, Cyrill Gorcunov wrote:
> > Implements verification of
> > 
> > - Bits of ESCR EventMask field (meaningful bits in field are hardware
> >   predefined and others bits should be set to zero)
> > 
> > - INSTR_COMPLETED event (it is available on predefined cpu model only)
> > 
> > - Thread shared events (they should be guarded by "perf_event_paranoid"
> >   sysctl due to security reason). The side effect of this action is
> >   that PERF_COUNT_HW_BUS_CYCLES become a "paranoid" general event.
> > 
> > Signed-off-by: Cyrill Gorcunov <gorcunov@...nvz.org>
> > CC: Lin Ming <ming.m.lin@...el.com>
> > CC: Frederic Weisbecker <fweisbec@...il.com>
> > CC: Ingo Molnar <mingo@...e.hu>
> > CC: Peter Zijlstra <peterz@...radead.org>
> > ---
... 
> I have tested this patch on a 16cpus Netburst server.
> The predefined hardware/cache events work well.
> 
> Thanks,
> Lin Ming
> 

Thanks a lot, Ming!
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