linux-kernel - Re: [PATCH] Revert "drm/i915: fix vblank wait test condition"

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <89k83a$9i7dn6@azsmga001.ch.intel.com>
Date:	Sun, 05 Sep 2010 18:21:10 +0100
From:	Chris Wilson <chris@...is-wilson.co.uk>
To:	Pekka Enberg <penberg@...nel.org>
Cc:	Sven Joachim <svenjoac@....de>, Hugh Dickins <hughd@...gle.com>,
	torvalds@...ux-foundation.org, linux-kernel@...r.kernel.org,
	Andrew Morton <akpm@...ux-foundation.org>,
	Sitsofe Wheeler <sitsofe@...oo.com>,
	Jesse Barnes <jbarnes@...tuousgeek.org>
Subject: Re: [PATCH] Revert "drm/i915: fix vblank wait test condition"

On Sun, 5 Sep 2010 19:40:06 +0300, Pekka Enberg <penberg@...nel.org> wrote:
> The "drm-intel" branch on top of 2.6.36-rc3 works OK on my machine. I
> do see the following errors in dmesg but they seem to be harmless:
> 
> [    1.004937] render error detected, EIR: 0x00000010
> [    1.004981] page table error
> [    1.005018]   PGTBL_ER: 0x00000102
> [    1.005058] [drm:i915_report_and_clear_eir] *ERROR* EIR stuck:
> 0x00000010, masking
> [    1.005139] render error detected, EIR: 0x00000010
> [    1.005194] page table error
> [    1.005244]   PGTBL_ER: 0x00000102

Do you see this on 2.6.36-rc3 as well? I had thought we had seen the last
of those. lspci would be useful to know precisely which chipset is
throwing that error.

> [    1.660043] [drm:intel_calculate_wm] *ERROR* Insufficient FIFO for
> plane, expect flickering: entries required = 36, available = 31.

These are based on a pessimistic guess for the memory latency and so
we overestimate the number of FIFO entries required to avoid underruns.
All that has changed is that we now print out the warning and have been
surprised by how far out our estimation has been. We first need to find
some way of improving our estimate for the memory latency and so trim the
watermarks. And under the circumstances where we need more entries than
are available on one pipe, we need to adjust the FIFO configuration.

In the short term, we will need to quieten the "harmless" error message.

I've lost track of the current status for releasing the documentation for
gen2/3. As always, it should be ready real soon now. 
-- 
Chris Wilson, Intel Open Source Technology Centre
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/