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Message-ID: <20100914174132.GN13563@erda.amd.com>
Date: Tue, 14 Sep 2010 19:41:32 +0200
From: Robert Richter <robert.richter@....com>
To: Ingo Molnar <mingo@...e.hu>, Peter Zijlstra <peterz@...radead.org>
CC: Don Zickus <dzickus@...hat.com>,
"gorcunov@...il.com" <gorcunov@...il.com>,
"fweisbec@...il.com" <fweisbec@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"ying.huang@...el.com" <ying.huang@...el.com>,
"ming.m.lin@...el.com" <ming.m.lin@...el.com>,
"yinghai@...nel.org" <yinghai@...nel.org>,
"andi@...stfloor.org" <andi@...stfloor.org>,
"eranian@...gle.com" <eranian@...gle.com>
Subject: Re: [PATCH] x86: fix duplicate calls of the nmi handler
On 13.09.10 16:37:13, Robert Richter wrote:
> Ingo, Peter,
>
> I finally found a system here, will start debugging
I found the reason why we get the unknown nmi. For some reason
cpuc->active_mask in x86_pmu_handle_irq() is zero. Thus, no counters
are handled when we get an nmi. It seems there is somewhere a race
accessing the active_mask. So far I don't have a fix available.
Changing x86_pmu_stop() did not help:
static void x86_pmu_stop(struct perf_event *event, int flags)
{
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
struct hw_perf_event *hwc = &event->hw;
if (test_bit(hwc->idx, cpuc->active_mask)) {
x86_pmu.disable(event);
__clear_bit(hwc->idx, cpuc->active_mask);
cpuc->events[hwc->idx] = NULL;
WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
hwc->state |= PERF_HES_STOPPED;
}
...
}
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
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