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Message-Id: <201009152112.42925.rjw@sisk.pl>
Date: Wed, 15 Sep 2010 21:12:42 +0200
From: "Rafael J. Wysocki" <rjw@...k.pl>
To: Miklos Szeredi <miklos@...redi.hu>
Cc: dhowells@...hat.com, linux-kernel@...r.kernel.org,
linux-arch@...r.kernel.org
Subject: Re: memory barrier question
On Wednesday, September 15, 2010, Miklos Szeredi wrote:
> Hi,
>
> I'm trying to understand memory barriers but not quite succeeding.
>
> Consider the following example:
>
> Start:
> p = NULL;
> x = 0;
>
> CPU1:
> atomic_inc(&x);
> p = &x;
>
> CPU2:
> if (p)
> z = atomic_read(p);
>
> Is it possible to end up with z == 0?
Yes, it is. CPU1 can reorder the two instructions in theory and if
the atomic_read() on CPU2 happens between them, it may return 0 in theory.
> What if there's a lock/unlock before setting "p"? What if there's a write
> barrier before setting "p"?
A write barrier should help and locking functions are implicit memory barriers.
Thanks,
Rafael
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