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Message-ID: <20100920140621.GA4920@aftab>
Date: Mon, 20 Sep 2010 16:06:21 +0200
From: Borislav Petkov <borislav.petkov@....com>
To: "H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...e.hu>,
Thomas Gleixner <tglx@...utronix.de>
CC: LKML <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>
Subject: [PATCH 2/2] x86, CPUID: Correct operator precedence when
generating mask
NEED_<cpufeature> masks used in the CPU feature testing macros are
cutoff at the last 5 bits to prevent overflow since the cpu feature
words are 32-bit-wide bitfields. Fix this for the PSE and PGE masks too.
This wasn't a real problem since the PSE and PGE bits are nicely < 31.
Cc: stable@...nel.org
Signed-off-by: Borislav Petkov <borislav.petkov@....com>
---
arch/x86/include/asm/required-features.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index 6c7fc25..0df924d 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -53,8 +53,8 @@
#define NEED_PSE 0
#define NEED_PGE 0
#else
-#define NEED_PSE (1<<(X86_FEATURE_PSE) & 31)
-#define NEED_PGE (1<<(X86_FEATURE_PGE) & 31)
+#define NEED_PSE (1<<(X86_FEATURE_PSE & 31))
+#define NEED_PGE (1<<(X86_FEATURE_PGE & 31))
#endif
#define NEED_MSR (1<<(X86_FEATURE_MSR & 31))
#define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31))
--
1.7.1
--
Regards/Gruss,
Boris.
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
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