linux-kernel - RE: high latency on 82573L

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Message-ID: <8DD2590731AB5D4C9DBF71A877482A9001691E8C45@orsmsx509.amr.corp.intel.com>
Date:	Mon, 20 Sep 2010 15:31:32 -0700
From:	"Allan, Bruce W" <bruce.w.allan@...el.com>
To:	Jesse Barnes <jbarnes@...tuousgeek.org>
CC:	Tony Jones <tonyj@...e.de>,
	"Kirsher, Jeffrey T" <jeffrey.t.kirsher@...el.com>,
	"Brandeburg, Jesse" <jesse.brandeburg@...el.com>,
	"Duyck, Alexander H" <alexander.h.duyck@...el.com>,
	"Waskiewicz Jr, Peter P" <peter.p.waskiewicz.jr@...el.com>,
	"Ronciak, John" <john.ronciak@...el.com>,
	"e1000-devel@...ts.sourceforge.net" 
	<e1000-devel@...ts.sourceforge.net>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"bphilips@...e.de" <bphilips@...e.de>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>
Subject: RE: high latency on 82573L

On Wednesday, September 08, 2010 11:21 AM, Jesse Barnes wrote:
> On Fri, 3 Sep 2010 11:59:30 -0700
> "Allan, Bruce W" <bruce.w.allan@...el.com> wrote:
> 
>> ASPM L1 must be disabled on this device otherwise the latency
>> described above will happen.  And even though there are log messages
>> indicating ASPM L1 is disabled, it really isn't according to the
>> verbose lspci output and PCI config space for the 2:0.0 device (see
>> LnkCtl above). Since CONFIG_PCIEASPM is enabled in your kernel
>> config, the driver is calling the kernel function
>> pci_disable_link_state() to disable ASPM L1 which it fails to do
>> because the variable aspm_disabled=1 (as indicated by the "ACPI FADT
>> declares the system doesn't support PCIe ASPM, so disable it"
>> message).  
>> 
>> I'm unclear on whether the aspm_disabled variable is meant to
>> indicate ASPM L0s or both ASPM L0s _and_ L1 are disabled (added PCI
>> maintainer and linux-pci mail-list).  To resolve this issue, we need
>> to either a) change e1000e to directly write the PCI config space to
>> disable ASPM L1 as was done before 6f461f6c7c, or b) fix
>> pci_disable_link_state() et. al. to allow for ASPM L1 to be disabled
>> properly.  I would prefer the latter option so that other drivers do
>> not have to use the same kludge to write to the PCI config space. 
>> Any input from the PCI guys? 
> 
> Yeah, I'd prefer this code to be in the core.  Are there any patches
> available yet?

Nothing from me at this point (been on vacation).  I might be able to
look into this further but not for another week or so (need to catch
up on the backlog that piled up while away).

Bruce.
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