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Message-ID: <20100929163118.GN13563@erda.amd.com>
Date: Wed, 29 Sep 2010 18:31:18 +0200
From: Robert Richter <robert.richter@....com>
To: Stephane Eranian <eranian@...gle.com>
CC: Cyrill Gorcunov <gorcunov@...il.com>,
"mingo@...hat.com" <mingo@...hat.com>,
"hpa@...or.com" <hpa@...or.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"yinghai@...nel.org" <yinghai@...nel.org>,
"andi@...stfloor.org" <andi@...stfloor.org>,
"peterz@...radead.org" <peterz@...radead.org>,
"ying.huang@...el.com" <ying.huang@...el.com>,
"fweisbec@...il.com" <fweisbec@...il.com>,
"ming.m.lin@...el.com" <ming.m.lin@...el.com>,
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Subject: Re: [tip:perf/urgent] perf, x86: Catch spurious interrupts after
disabling counters
On 29.09.10 11:33:07, Stephane Eranian wrote:
> There is something else bothering me with cpuc->running.
>
> It is not reset outside of the interrupt handler. So what if
> event scheduling shuffles things around and an event is
> moved somewhere else. Don't you need to clear the
> cpuc->running[idx] for the old counter index?
We can clear it only in the NMI handler, because the next NMI after
stopping a counter must mark the counter as handled. This may cause
some false positives, but it is the best we can get.
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
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