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Message-id: <alpine.LFD.2.00.1009301810380.7033@localhost.localdomain>
Date: Thu, 30 Sep 2010 18:14:35 -0400 (EDT)
From: Len Brown <lenb@...nel.org>
To: Matthew Garrett <mjg59@...f.ucam.org>
Cc: Linux Power Management List <linux-pm@...ts.osdl.org>,
linux-pci@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot
hang
> > When the Lenovo Ideapad S10-3 is booted with HT enabled,
> > it hits a boot hang in the intel_idle driver.
> >
> > This occurs when entering ATM-C4 for the first time,
> > unless BM_STS is first cleared.
> >
> > acpi_idle doesn't see this because it first checks
> > and clears BM_STS, but it would hit the same hang
> > if that check were disabled.
>
> If there's hardware that expects BM_STS to be cleared, and if we've
> previously always cleared BM_STS, shouldn't intel_idle be doing the same
> thing?
No, we don't always clear BM_STS with acpi_idle --
we check (and clear) that bit only if the acpi tables
tell us to do so.
BM_STS is a status bit, not a control bit.
It is a surprise that the NM10 chip-set requires that it be cleared --
apparently once at boot time.
No, I don't want intel_idle to know about this chip-set quirk,
and I don't want to add an IO access to the idle hot path
if we can possibly avoid it.
thanks,
Len Brown, Intel Open Source Technology Center
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