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Message-ID: <1286360874-1471-1-git-send-email-robert.richter@amd.com> Date: Wed, 6 Oct 2010 12:27:52 +0200 From: Robert Richter <robert.richter@....com> To: Ingo Molnar <mingo@...e.hu> CC: LKML <linux-kernel@...r.kernel.org> Subject: [PATCH 0/2] apic, x86: Use BIOS settings to setup AMD EILVT APIC registers This patch set changes the way of setting up EILVT APIC registers (APIC500-530). See family 10h bkdg: http://support.amd.com/us/Processor_TechDocs/31116.pdf Until now, Linux has assigned fixed LVT offsets for IBS and MCE threshold. With the introduction of new cpu families we want to be more flexible and assign those LVT offsets dynamically. The general apporach here is to let the BIOS decide which offsets to use. Linux will then detect this by reading the corresponding hw registers that contain the LVT offsets. This requires to check if the BIOS is correctly setting up the LVT offsets. Otherwise a firmware bug message will be thrown. This is implemented in patch #1. Patch #2 implements the detection of MCE threshold and IBS LVT offsets and changes the subsystem initialization. The code to setup the IBS LVT offset on family 10h systems will remain as a workaround that will be only applied in case of an invalid IBS LVT BIOS setup. -Robert -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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