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Message-ID: <AANLkTi=nTUvcmk1XBHx=Dp6Qqiksq=m_RDn96y1J+Mck@mail.gmail.com>
Date:	Thu, 7 Oct 2010 16:25:24 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	mingo@...e.hu, Hans.Rosenfeld@....com, robert.richter@....com,
	tglx@...utronix.de, linux-kernel@...r.kernel.org,
	Andreas.Herrmann3@....com, peterz@...radead.org,
	fweisbec@...il.com, rostedt@...dmis.org, acme@...hat.com,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>, eranian@...il.com
Subject: Re: [RFC 0/3] Basic support for LWP

On Thu, Oct 7, 2010 at 4:20 PM, H. Peter Anvin <hpa@...or.com> wrote:
> On 10/07/2010 07:11 AM, Stephane Eranian wrote:
>> On Thu, Oct 7, 2010 at 3:59 PM, H. Peter Anvin <hpa@...or.com> wrote:
>>> On 10/07/2010 03:46 AM, Stephane Eranian wrote:
>>>>
>>>> As for the patch itself, I am not an expert at xsave/xrstor, but it seems to
>>>> me you could decouple LWP from FPU. I think  Brian had the same comment.
>>>> I suspect this can be done and it will certainly look cleaner.
>>>>
>>>
>>> Well, once you're using XSAVE you're not decoupled from the FPU.  Worse,
>>> if you're using XSAVE and not honoring CR0.TS you have a major design flaw.
>>>
>> Is that to say, that if you use LWP you will have to save/restore FPU state even
>> though you're not actually using it?
>>
>
> No, but you wouldn't be able to use lazy FPU.
>
You mean lazy restore, I am guessing here.
Is that to say, you cannot figure out whether the FPU state in
the CPU on ctxsw in is yours anymore?

>        -hpa
>
> --
> H. Peter Anvin, Intel Open Source Technology Center
> I work for Intel.  I don't speak on their behalf.
>
>
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