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Date:	Tue, 12 Oct 2010 15:12:30 -0700
From:	Jacob Pan <jacob.jun.pan@...ux.intel.com>
To:	Thomas Gleixner <tglx@...utronix.de>
Cc:	linux-kernel@...r.kernel.org, mingo@...hat.com, hpa@...or.com,
	mingo@...e.hu, linux-tip-commits@...r.kernel.org
Subject: Re: [tip:irq/core] x86: Sanitize apb timer interrupt handling

Thomas Gleixner Tue, 12 Oct 2010 23:28:19 +0200 (CEST)
>On Tue, 12 Oct 2010, Jacob Pan wrote:
>
>> 
>> >x86: Sanitize apb timer interrupt handling
>> >
>> >Disable the interrupt in CPU_DEAD where it belongs.
>> My main concern is the performance cost. The power management code for
>> Moorestown system make use of the cpu hotplug code (disable_nonboot_cpus)
>> but much more frequently. The system low power states are call S0 idle
>> state (s0ix).
>> 
>> Leaving the irq enabled at the chip and desc level between S0ix states
>> might give some performance benefit. That was my original thought.
>> Will it cause problems?
>
>Errm. I merily moved it to the place where it should be. You do the
>disable/enable dance already today.
>
I think I only do disable/enable at the timer HW level today during cpu hp
notification, not calling disable_irq(). Am i missing something?

Thanks,

Jacob
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