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Message-ID: <1287150874.29097.1515.camel@twins>
Date:	Fri, 15 Oct 2010 15:54:34 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	eranian@...gle.com
Cc:	linux-kernel@...r.kernel.org, mingo@...e.hu, paulus@...ba.org,
	davem@...emloft.net, fweisbec@...il.com,
	perfmon2-devel@...ts.sf.net, eranian@...il.com,
	robert.richter@....com
Subject: Re: [PATCH] perf_events: fix bogus AMD64 generic TLB events

On Fri, 2010-10-15 at 15:15 +0200, Stephane Eranian wrote:
> PERF_COUNT_HW_CACHE_DTLB:READ:MISS had a bogus umask value of 0 which
> counts nothing. Needed to be 0x7 (to count all possibilities).
> 
> PERF_COUNT_HW_CACHE_ITLB:READ:MISS had a bogus umask value of 0 which
> counts nothing. Needed to be 0x3 (to count all possibilities).
> 
> Signed-off-by: Stephane Eranian <eranian@...gle.com>

Thanks! tagged it for -stable as well.
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