| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20101020121847.GE20124@basil.fritz.box> Date: Wed, 20 Oct 2010 14:18:48 +0200 From: Andi Kleen <andi@...stfloor.org> To: Peter Zijlstra <peterz@...radead.org> Cc: Andi Kleen <andi@...stfloor.org>, Eric Dumazet <eric.dumazet@...il.com>, Shaohua Li <shaohua.li@...el.com>, lkml <linux-kernel@...r.kernel.org>, Ingo Molnar <mingo@...e.hu>, "hpa@...or.com" <hpa@...or.com>, "Chen, Tim C" <tim.c.chen@...el.com> Subject: Re: [PATCH 2/2]x86: spread tlb flush vector between nodes On Wed, Oct 20, 2010 at 02:08:32PM +0200, Peter Zijlstra wrote: > On Wed, 2010-10-20 at 14:06 +0200, Andi Kleen wrote: > > On Wed, Oct 20, 2010 at 01:20:52PM +0200, Peter Zijlstra wrote: > > > On Wed, 2010-10-20 at 09:31 +0200, Andi Kleen wrote: > > > > Really a lot of the per CPU scaling we have today should be per core > > > > or per node to avoid explosion. > > > > > > Shouldn't that be per-cache instead of per-core? > > > > That's the same on modern x86: > > Last time I checked there's more than 1 directory in arch/ Not sure what your point is? I believe non x86 server processors have similar cache layouts as the one I described, occasionally with another cache level, and should do well with a similar setup. For non server it typically doesn't matter too much because there are not enough cores. -Andi -- ak@...ux.intel.com -- Speaking for myself only. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists