linux-kernel - Re: [tip:x86/mm] percpu: Introduce a read-mostly percpu API

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Message-ID: <4CBFD92B.5090503@zytor.com>
Date:	Wed, 20 Oct 2010 23:09:47 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Eric Dumazet <eric.dumazet@...il.com>
CC:	Shaohua Li <shaohua.li@...el.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"mingo@...hat.com" <mingo@...hat.com>,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	"hpa@...ux.intel.com" <hpa@...ux.intel.com>
Subject: Re: [tip:x86/mm] percpu: Introduce a read-mostly percpu API

On 10/20/2010 11:07 PM, Eric Dumazet wrote:
> Le mercredi 20 octobre 2010 à 22:54 -0700, H. Peter Anvin a écrit :
> 
>> L1_CACHE_BYTES is completely pointless, since if there is sharing to
>> worry about *at all*, it's probably at the L2 or L3 cache levels.
>>
> 
> I see, and we dont have better way to express this hint/requirement than
> using PAGE_SIZE or INTERNODE_CACHE_SHIFT ?
> 
> In your patch you force a PAGE_SIZE alignement *before*
> *(.data..percpu..page_aligned)   
> 
> If this alignment is really needed, this should be part of another
> patch, since this fixes a previous bug in 2.6.36 ?
> 

It was part of Shaohua's patch... I don't know if it does anything
useful, but it also doesn't hurt.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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