lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 22 Oct 2010 14:05:51 -0400
From:	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	Jeremy Fitzhardinge <jeremy@...p.org>,
	the arch/x86 maintainers <x86@...nel.org>,
	"Xen-devel@...ts.xensource.com" <Xen-devel@...ts.xensource.com>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86: define arch_vm_get_page_prot to set _PAGE_IOMAP
 on VM_IO vmas

On Fri, Oct 22, 2010 at 02:02:31PM -0400, Konrad Rzeszutek Wilk wrote:
> On Fri, Oct 22, 2010 at 09:44:08AM -0700, H. Peter Anvin wrote:
> > On 10/22/2010 08:08 AM, Konrad Rzeszutek Wilk wrote:
> > >>
> > >> Okay, could you clarify this part a bit?  Why does the kernel need to
> > >> know the difference between "pseudo-physical" and "machine addresses" at
> > >> all?  If they overlap, there is a problem, and if they don't overlap, it
> > >> will be a 1:1 mapping anyway...
> > > 
> > > The flag (_PAGE_IOMAP) is used when we set the PTE so that the MFN value is
> > > used instead of the PFN. We need that b/c when a driver does page_to_pfn()
> > > it ends up using the PFN as bus address to write out registers data.
> > > 
> > > Without this patch, the page->virt->PFN value is used and the PFN != to real MFN
> > > so we end up writing in a memory address that the PCI device has no idea about.
> > > By setting the PTE with the MFN, the virt->PFN gets the real MFN value.
> > > 
> > > The drivers I am talking about are mostly, if not all, located in drivers/gpu
> > > and it looks that we are missing two more patches to utilize the patch
> > > that Jeremy posted.
> > > 
> > > Please note that I am _not_ suggesting that the two patches
> > > below should go out - I still need to post them on drm mailing list.
> > > 
> > 
> > I'm still seriously confused.  If I understand this correctly, we're
> > talking about DMA addresses here (as opposed to PIO addresses, i.e.
> > BARs), right?
> 
> Correct. The BARs are ok since they go through the ioremap.

Whoops. I answered that incorrectly. No, we are not talking about
BARs. The BARs are ok (look at x86/PCI: make sure _PAGE_IOMAP it set on pci mappings
patch, http://amailbox.org/mailarchive/linux-kernel/2010/10/12/4630930/thread)

We are talking about the GPU's VM engine (or the GART on the Northbridge).
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ