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Message-ID: <4CDAF0D8.1000100@kernel.org>
Date: Wed, 10 Nov 2010 11:22:00 -0800
From: Yinghai Lu <yinghai@...nel.org>
To: Jan Beulich <JBeulich@...ell.com>
CC: mingo@...e.hu, tglx@...utronix.de, linux-kernel@...r.kernel.org,
hpa@...or.com
Subject: Re: [PATCH] x86-64: more fixes and cleanup to AMD Fam10 MMCONF enabling
On 11/08/2010 12:04 AM, Jan Beulich wrote:
>>>> On 05.11.10 at 18:51, Yinghai Lu <yinghai@...nel.org> wrote:
>> On 11/05/2010 03:59 AM, Jan Beulich wrote:
>>> Unfortunately it turned out the original code had more issues: We want
>>> to place the region above 4G in any case (even if TOM2 isn't enabled
>>> or invalid), and the base mask definition was improperly typed (thus
>>> causing shifts by FAM10H_MMIO_CONF_BASE_SHIFT to produce other than
>>> the intended result). Fixing this in turn allowed simplifying the MMIO
>>> region detection code, as regions ending below TOM2 now aren't of
>>> interest anymore.
>>>
>>> This will only apply cleanly on top of yesterday's patch titled
>>> "x86-64: fix and clean up AMD Fam10 MMCONF enabling".
>>
>> I don't think we have systems that have Enable bit set, but TOM2 < 4G.
>
> I suppose that's true, but making the kernel independent of
> BIOS flaws (especially when it's that cheap) seems like a good
> idea to me. But of course, if that's what would be hindering
> acceptance of the patch, I'd re-submit with that part dropped.
I'm ok with your change.
Please come out one updated version with meaningful MACRO.
Thanks
Yinghai
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